1. Field of the Invention
This invention relates to an upper electrode for dry etching devices for production of semiconductor devices and the dry etching device including the same, more particularly to an upper electrode which is prevented from being contaminated with an impurity, has a sufficient adhesive strength between the pedestal and electrode plate of silicon, secures high-precision parallelism with the lower electrode, and hence improves the etching characteristics and silicon wafer yield, and to the dry etching device including the same.
2. Description of the Prior Art
As information devices represented by computers advance, the semiconductor integrated circuit as the main component of these devices is increasingly required to have a higher degree of integration. In the production of a semiconductor device, its components as well as the stock materials are handled in a clean working atmosphere, e.g., in a clean room, for securing the performance requirements, because the device is extremely sensitive to contamination with an impurity. It is needless to say that each component is required not to produce an impurity.
The wafer treatment processes, represented by ion implantation, dry etching and sputtering, are effected in a reaction chamber, frequently referred to simply as a chamber, which can be evacuated to a high degree of vacuum. The chamber is increasingly required to meet the higher purity standards, as degree of integration increases for semiconductor integrated circuits.
Taking dry etching as an example, the component members inside of the chamber are described by referring to FIG. 3. The chamber normally includes a pair of electrodes, i.e., upper and lower electrodes, facing each other, the lower electrode being connected to an RF power source to produce a plasma between the counter electrodes. A silicon wafer is set immediately above the lower electrode via a mounting member, to be etched with an etchant gas in a plasma atmosphere.
The conventional upper electrode for a dry etching device is composed of an electrode plate of silicon which is joined to a pedestal (or support ring) of metal or metal oxide by brazing with indium or the like.
However, pedestals of metal or metal oxide tend to be contaminated with an impurity, and graphite has been investigated as a substitute for the metal or metal oxide. Joining the electrode plate to a graphite pedestal by brazing with indium or the like, although securing the necessary adhesive strength, not only requires time-consuming pretreatment and work at high temperature during the production period but also causes distribution of joint layer thickness, making it difficult to have the sufficient parallelism between the upper and lower electrodes necessary for uniform etching treatment, and hence this method is unsuitable for joining members required to have highly precision parallelism. The brazing metal itself may cause contamination of the silicon wafer. Therefore, the joining method rarely gives good etching characteristics for dry etching, and tends to lower the yield of the semiconductor device or silicon wafer.
Several attempts have been made to solve these problems. For example, U.S. Pat. No. 5,074,456 proposes an upper electrode joined using metal-filled epoxies, and U.S. Pat. No. 6,073,577 proposes an upper electrode joined using a metal particle-containing elastomeric materials.
These references state that the electrode plate and pedestal can be joined to each other more precisely, because of decreased thickness of the adhesive layer to a size of the metal particles, keeping good parallelism between the upper and lower electrodes and avoiding contamination with an impurity.
However, these inventions have a lower thermal conductivity between the electrode plate and pedestal, in spite of the metallic filler present in the adhesive layer, than the case where they are joined by a brazing material, possibly causing a temperature distribution between the electrode plate periphery and center, and hence deteriorating the etching characteristics.
It is an object of the present invention to provide an upper electrode which is prevented from being contaminated with an impurity, secures not only high-precision parallelism with the lower electrode but also good thermal conductance between the electrode plate and pedestal, and hence improves the etching characteristics and silicon wafer yield by solving the problems involved in the conventional upper electrode for dry etching devices, and also to provide the dry etching device including the same.
The inventors of the present invention have found, after extensive study to develop the optimum upper electrode for dry etching devices in order to solve the above problems, that good thermal conductance can be realized between the electrode and pedestal when graphite, which is prevented from being contaminated with an impurity, is used as the material for the pedestal and joined to the electrode plate of silicon by an organic adhesive containing a specific filler, reaching the present invention.
The first invention provides an upper electrode for dry etching devices, comprising an electrode plate of silicon which is supported by a pedestal, wherein
(a) the pedestal is made of graphite, and
(b) the electrode plate of silicon is joined to the pedestal by an organic adhesive containing a filler having a Young""s modulus of 6xc3x97109 to 68xc3x97109 N/m2.
The second invention provides an upper electrode which is the same as that of the first invention except that the pedestal is coated with glass-like carbon for the portion not joined to the electrode plate of silicon.
The third invention provides an upper electrode which is the same as that of the first invention wherein the electrode plate of silicon is pressed to the pedestal via the organic adhesive containing beforehand an electrically and thermally conductive filler of uniform particle size at a pressure determined by the correlation between adhesion pressure and filler particle size, in order to control the joint layer at a uniform thickness.
The fourth invention provides an upper electrode which is the same as that of one of the first to third first inventions wherein the filler is of graphite and contained in said organic adhesive at 5 to 30% by weight.
The fifth invention provides an upper electrode which is the same as that of one of the first to fourth inventions wherein the organic adhesive is a silicone-based one.
The sixth invention provides a dry etching device which includes the upper electrode of one of the first to fifth inventions.
The present invention relates to an upper electrode which is prevented from being contaminated with an impurity, secures not only high-precision parallelism with the lower electrode but also good thermal conductance between the electrode plate and pedestal, and hence improves the etching characteristics and silicon wafer yield, and also to provide the dry etching device including the same as described above. The preferred embodiments of the invention includes the followings:
(1) The upper electrode for dry etching devices according to one of the first through fifth invention, wherein the organic adhesive is an epoxy-base or a silicon-base adhesive.
(2) The upper electrode of the above for dry etching devices, wherein the organic adhesive is an epoxy- or silicone-based one incorporated with at least one type of filler having a Young""s modulus of 6xc3x97109 to 68xc3x97109 N/m2.
(3) The upper electrode of the above for dry etching devices, wherein the organic adhesive is of the one-pack type.
(4) The upper electrode of the above for dry etching devices according to the second invention, wherein the pedestal is coated with glass like carbon to a thickness of at least 1 to 3 xcexcm.